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Hello Wensong,
This patch addresses the locking in the est scheduler (I wasn't aware of it :)).
It is then compliant to 2.5.x locking. Please consider applying if correct.
It probably doesn't matter, because there is no other writers of est_list.
There is one thread writing the IPVS config at a time.
Right, I should have put the question mark in the subject line. I was
also more thinking of having a more or less close code base to the 2.5.x
line.
Questions:
o What about syncing the OVERLOADED code from 2.5.x to 2.4.x?
Yes, but we need to make some release candidates before releasing
ipvs-1.0.10.
Do you want to do it or shall I give it a spin?
o What do you think about introducing the sltimer changes from 2.5.x to 2.4.x?
Although the sltimer changes from 2.5.x looks nicer, it doesn't improve
any performance. :)
I see, didn't know that. But for cosmetic reasons and the same reasons
that go with the locking patch for the est scheduler I think it would be
advisable to keep 2.4.x ipvs close to 2.5.x. That's all ;).
o Why do we have two different services list traversals for rr and wrr?
rr is simple, though wrr is superset of rr.
Sure, but I mean wrr is rr with weight "choosal", why do we need to have
it so much different to rr (or am I misreading the code)?
Also, the static int gcd() can be optimised, look:
static int gcd_lvs(int a, int b) {
int c;
while ((c = a % b)) {
a = b;
b = c;
}
return b;
}
static int gcd_new(int a, int b) {
while (b > 0) {
a = a % b;
a = a + b;
b = a - b;
a = a - b;
}
return a;
}
gcd_lvs:
pushl %ebp
movl %esp, %ebp
pushl %esi
pushl %ebx
subl $4, %esp
movl 8(%ebp), %ebx
movl 12(%ebp), %esi
movl %ebx, %eax
cltd
idivl %esi
testl %edx, %edx
movl %edx, %ecx
je .L7
.p2align 4,,15
.L7:
popl %edx
movl %esi, %eax
popl %ebx
popl %esi
popl %ebp
ret
gcd_new:
pushl %ebp
movl %esp, %ebp
pushl %ebx
subl $4, %esp
movl 12(%ebp), %ebx
movl 8(%ebp), %ecx
testl %ebx, %ebx
jle .L14
.p2align 4,,15
.L14:
movl %ecx, %eax
popl %ecx
popl %ebx
popl %ebp
ret
Much faster :) :)
Best regards,
Roberto Nibali, ratz
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echo '[q]sa[ln0=aln256%Pln256/snlbx]sb3135071790101768542287578439snlbxq'|dc
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